The basic unit of time in UMTS radio signals is a 10 milli-second (ms) radio frame, which is divided into 15 slots of 2560 chips each. UMTS radio signals from a cell (or base station) to a UMTS receiver are “downlink signals,” while radio signals in the reverse direction are termed “uplink signals.”
The physical layer of the universal mobile telecommunication system (UMTS) wideband code-division multiple access (WCDMA) standard uses direct sequence spread spectrum (DSSS) modulation with a chip rate of 3.84 Mcps. The frequency division duplex (FDD) mode carries the uplink and the downlink channels on separate frequency bands of 5 MHz each. This mode is typically used for large outdoor cells because it can support a larger number of users than time division duplex (TDD) mode. In TDD mode, the transmissions share the same uplink and downlink channels during different time slots. The TDD mode does not support as many users as the FDD mode, and hence, TDD mode is more suitable for smaller cells. TDD mode is also more suited for carrying asymmetric traffic compared to FDD mode.
An important procedure performed by a receiver within a UMTS network, for example a CDMA mobile receiver, is the cell search operation. Cell searching typically is performed by a cell search system that is incorporated as part of the receiver. The cell search system is activated after the receiver is powered on to determine synchronization information pertaining to the cell in which the receiver is located. The cell search operation is a three-stage process. That is, the cell search system performs slot synchronization (primary synchronization), frame synchronization and scrambling code group determination (secondary synchronization), and scrambling code determination.
After power-up, the mobile terminal (MT) has to perform several operations before voice/data communications can begin. First, the receiver needs to implement automatic gain control (AGC) in order to scale the received signal power and prevent clipping at the analog-to-digital converter. This process first can be performed on the synchronization channel (SCH) and later the descrambled common pilot channel (CPICH) can be used once the cell's scrambling code is acquired.
Next the receiver needs to acquire timing synchronization. Timing synchronization can be achieved from the SCH channel. The MT searches for the strongest SCH signal that it can find and that signal determines with which cell the MT will initiate communications. Since the SCH channel is periodic, the receiver can correlate against the primary SCH to derive a timing error. Based on this channel, the receiver can achieve chip, symbol and slot synchronization.
The primary SCH carries the same signal for all cells in the system. The secondary SCH is different for each cell and carries a pattern of secondary synchronization codes (SSCs) that repeat every frame. Once the MT receives this sequence, it will have frame synchronization.
In performing cell searching, the cell search system accesses a synchronization channel (SCH) and a common pilot channel (CPICH) of the received wireless signal. The SCH is a composite channel formed from a primary SCH and a secondary SCH. Within each slot, the primary SCH specifies a primary synchronization code (PSC). The primary SCH, however, only contains data during the first 256 chips of each 2560 chip slot. As is known, “chip” or “chip rate” refers to the rate of the spreading code within a CDMA communication system.
In addition, the pattern identifies to which scrambling code group the current cell's scrambling code belongs. There are 64 scrambling code groups and each group contains eight scrambling codes. Once the MT has determined the current cell's scrambling code group, the search for the current cell's scrambling code is narrowed to the eight codes in that group.
The typical acquisition process for a carrier based receiver is as follows:
1. Primary Cell Search
2. Secondary Cell Search
3. Scrambling Code Determination
4. Multipath Searching
5. Finger Assignment
6. Locking of Code Tracking and Automatic Frequency Control (AFC) loops
7. Maximal Ratio Combining (MRC) of finger output
8. Receiver lock is acquired and data can be sent to upper layers
This acquisition process is long and involved and can take on the order of several seconds to complete.
The problem addressed is how to implement an area-efficient correlation block for the second stage of the Primary Cell Search processing in a 3G WCDMA receiver. The first stage of the Primary Cell Search processing involves correlating 16 successive samples in a row and generating a correlation output every 16 chips. Thus, the storage requirements for the first stage correlator are that it only needs to store 16 chips at a time for a given correlation, which is relatively simple to do. Even for a receiver that is using 4 samples per chip, the storage requirements are still only 256 samples and they are successive samples. This means that the first stage correlator processes a contiguous group of samples as they arrive.
Each correlation in the second stage of processing also requires 16 chips. However, because of the nature of the hierarchical Golay codes used in the 3G WCDMA standard, each of these 16 chips is located 16 chips apart. Thus, for a receiver that uses 4 samples per chip, 256 chips still need to be processed, but they are not contiguously located. Instead, a given correlation needs 256 chips located 16*4=64 samples apart. In order to store all the samples needed for a given second stage correlation, the receiver would require a tapped delay line with 1024 locations (16 chips located 16 chips apart is 256 chips, and 4 samples per chip is 1024 samples). The prior art has used a register-based design to implement the second stage correlation. This number of registers (e.g., 1024) is not practical in an ASIC design because it consumes a large amount of die space on the ASIC. Thus, a more area-efficient approach would be advantageous.